Model checking

Results: 996



#Item
831Theoretical computer science / Binary decision diagram / Model checking / Cryptography / Boolean function / Polynomial / P / Applied mathematics / Boolean algebra / Mathematics / Diagrams

Analysis of HFE from a BDD point of view J.F Michon LIFAR∗ J.B. Yunes LIAFA†

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Source URL: ccc.ustc.edu.cn

Language: English - Date: 2006-10-24 07:55:03
832Proof theory / Mathematical logic / Logical syntax / Formal systems / Logical truth / Model checking / Communications protocol / Formal methods / Correctness / Logic / Mathematics / Computing

TLA+ Verification of Cache-Coherence Protocols Homayoon Akhiani, Damien Doligez∗ , Paul Harter, Leslie Lamport, Mark Tuttle, and Yuan Yu Compaq Joshua Scheid

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Source URL: www.markrtuttle.com

Language: English - Date: 2007-04-26 00:00:00
833Cache coherency / Parallel computing / Cryptographic protocols / Communications protocol / Data transmission / Protocols / Cache coherence / Model checking / Cache / Computing / Concurrent computing / Data

Parametric Verification of Industrial Cache Protocols M URALI TALUPUR S AVA K RSTI C´ J OHN O’L EARY

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Source URL: www.markrtuttle.com

Language: English - Date: 2011-09-30 00:00:00
834Image scanner / Ballot / Election Systems & Software / Technology / Accountability / Electronic voting / Politics / Information society

Model 100 v5.2.0 Pre-Election Day Checklist Checking Supplies and the Equipment 1. 1 paper spool per scanner per election

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Source URL: www.in.gov

Language: English - Date: 2014-07-01 03:05:47
835Formal methods / Applied mathematics / Model checking / Animal communication / Neuroethology / Waggle dance / Random walk / SPIN model checker / Linear temporal logic / Automata theory / Mathematics / Models of computation

1 Abstract. Recent advances in parallel model checking for liveness properties achieve significant capacity increases over sequential model checkers. However, the capacity of parallel model checkers is in turn limited b

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Source URL: people.cs.clemson.edu

Language: English - Date: 2013-08-14 13:37:54
836Hardware description languages / Logic in computer science / SystemVerilog / Verilog / E / Assertion / Model checking / Formal methods / Formal verification / Electronic engineering / Electronic design automation / Hardware verification languages

Preface i SystemVerilog Assertions rd

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Source URL: systemverilog.us

Language: English - Date: 2012-09-03 22:27:59
837Applied mathematics / Electronic engineering / Electronic design automation / Electronic design / Human-based computation / Crowdsourcing / Formal verification / Software verification / Model checking / Theoretical computer science / Formal methods / Logic in computer science

CrowdMine: Towards Crowdsourced Human-Assisted Verification Wenchao Li Sanjit A. Seshia Somesh Jha

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Source URL: www.eecs.berkeley.edu

Language: English - Date: 2012-05-25 20:37:06
838Software engineering / Computer programming / Esterel / SIGNAL / Model checking / Embedded system / Scheduling / Porting / Operating system / Hardware description languages / Synchronous programming languages / Computing

Taxys = Esterel + Kronos A tool for verifying real-time properties of embedded systems 1 V. Bertin

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Source URL: www-verimag.imag.fr

Language: English - Date: 2012-12-31 04:25:31
839Information / Model checking / Communications protocol / Component-based software engineering / Software development process / Distributed computing / Software engineering / Software architecture / Data

Brief Announcement: Incremental Component-Based Modeling, Verification, and Performance Evaluation of Distributed Reset⋆ Ananda Basu, Borzoo Bonakdarpour, Marius Bozga, and Joseph Sifakis ´ VERIMAG, Centre Equation,

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Source URL: www-verimag.imag.fr

Language: English - Date: 2012-12-31 04:25:32
840Formal methods / Concurrent computing / Software development / Electronic engineering / SIGNAL / Esterel / Real-time computing / Actor model / Model checking / Computing / Hardware description languages / Synchronous programming languages

Building Models of Real-Time Systems from Application Software JOSEPH SIFAKIS, STAVROS TRIPAKIS, ASSOCIATE MEMBER, IEEE, AND SERGIO YOVINE Invited Paper We present a methodology for building timed models of real-time

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Source URL: www-verimag.imag.fr

Language: English - Date: 2012-12-31 04:25:32
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